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 FDD2612
August 2001
FDD2612
200V N-Channel PowerTrench MOSFET
General Description
This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS(ON) and fast switching speed.
Features
* 4.9 A, 200 V. RDS(ON) = 720 m @ VGS = 10 V
* High performance trench technology for extremely low RDS(ON) * High power and current handling capability * Fast switching speed * Low gate charge (8nC typical)
Applications
* DC/DC converter
D
D G
G
S
TO-252
S
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Power Dissipation
TA=25oC unless otherwise noted
Parameter
Ratings
200 20
(Note 1a)
Units
V V A W
4.9 10 42 3.8 1.6 -55 to +175
(Note 1) (Note 1a) (Note 1b)
TJ, TSTG
Operating and Storage Junction Temperature Range
C
Thermal Characteristics
RJC RJA RJA Thermal Resistance, Junction-to-Case Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient
(Note 1) (Note 1a) (Note 1b)
3.5 40 96
C/W C/W C/W
Package Marking and Ordering Information
Device Marking FDD2612 Device FDD2612 Reel Size 13'' Tape width 16mm Quantity 2500 units
2001 Fairchild Semiconductor Corporation
FDD2612 Rev B1 (W)
FDD2612
Electrical Characteristics
Symbol
WDSS IAR
TA = 25C unless otherwise noted
Parameter
Drain-Source Avalanche Energy Drain-Source Avalanche Current
Test Conditions
Single Pulse,VDD = 100 V,ID = 1.5A
Min
Typ
Max Units
90 1.5 mJ A
Drain-Source Avalanche Ratings (Note 2)
Off Characteristics
BVDSS BVDSS TJ IDSS IGSSF IGSSR Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage, Forward Gate-Body Leakage, Reverse
(Note 2)
VGS = 0 V,
ID = 250 A
200 246 1 100 -100
V mV/C A nA nA
ID = 250 A, Referenced to 25C VDS = 160 V, VGS = 20 V, VGS = -20 V , VGS = 0 V VDS = 0 V VDS = 0 V
On Characteristics
VGS(th) VGS(th) TJ RDS(on) ID(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On Resistance On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
(Note 2)
ID = 250 A VDS = VGS, ID = 250 A, Referenced to 25C ID = 1.5 A VGS = 10 V, VGS = 10 V, ID = 1.5 A,TJ = 125C VGS = 10 V, VDS = 10 V VDS = 10 V, VDS = 100 V, f = 1.0 MHz ID = 1.5 A V GS = 0 V,
2
4 - 8.6 600 1125
4.5
V mV/C
720 1422
m A
5 4.4 234 18 8
S pF pF pF 12 12 30 16 11 ns ns ns ns nC nC nC
Dynamic Characteristics
Switching Characteristics
Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
VDD = 100 V, VGS = 10 V,
ID = 1 A, RGEN = 6
6 6 17 8
VDS = 100 V, VGS = 10 V
ID = 1.5 A,
8 1.6 2.2
Drain-Source Diode Characteristics and Maximum Ratings
IS VSD Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward VGS = 0 V, IS = 3.2 A Voltage 3.2
(Note 2)
A V
0.8
1.2
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
a) RJA = 40C/W when mounted on a
2 1in pad of 2 oz copper
b) RJA = 96C/W when mounted on a minimum pad.
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% 3. Maximum current is calculated as:
PD RDS(ON)
where PD is maximum power dissipation at TC = 25C and RDS(on) is at TJ(max) and VGS = 10V. Package current limitation is 21A
FDD2612 Rev B1(W)
FDD2612
Typical Characteristics
5
1.3
6.0V
ID, DRAIN CURRENT (A) 4
6.5V
RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE
VGS =10V
VGS = 5.5V
1.2
3
6.0V
1.1
2
5.5V
6.5V
7.5V 10V
1
1
0 0 2 4 6 8 10 12 VDS, DRAIN-SOURCE VOLTAGE (V)
0.9 0 1 2 3 4 5 ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.4 RDS(ON), ON-RESISTANCE (OHM)
2.6
RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE
2.2 1.8 1.4 1 0.6 0.2 -50
ID = 1.5A VGS = 10V
ID = 0.8A
1.2
TA = 125oC
1
0.8
0.6
TA = 25oC
0.4
-25
0
25
50
75
100
o
125
150
175
4
5
6
7
8
9
10
TJ, JUNCTION TEMPERATURE ( C)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
8
IS, REVERSE DRAIN CURRENT (A)
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
10
VDS = 25V
VGS = 0V
1
ID, DRAIN CURRENT (A)
6
TA = 125oC
0.1
4
25oC
0.01
2
TA = 125oC 25oC -55oC
-55oC
0.001
0 3 4 5 6 7
0.0001 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDD2612 Rev B1(W)
FDD2612
Typical Characteristics
15 VGS, GATE-SOURCE VOLTAGE (V) ID = 1.5A 12 CAPACITANCE (pF) 150V 9 250 200 150 100 COSS 50 CRSS 0 0 2 4 6 8 10 Qg, GATE CHARGE (nC) 0 0 40 80 120 160 200 VDS, DRAIN TO SOURCE VOLTAGE (V) VDS = 50V 100V 300 CISS 350 f = 1MHz VGS = 0 V
6
3
Figure 7. Gate Charge Characteristics.
100
Figure 8. Capacitance Characteristics.
100 P(pk), PEAK TRANSIENT POWER (W) SINGLE PULSE RJA =96C/W TA = 25C
ID, DRAIN CURRENT (A)
10 RDS(ON) LIMIT 1 10s 0.1 VGS = 10V SINGLE PULSE RJA = 96oC/W TA = 25oC DC 1ms 10ms 100ms 1s
100s
80
60
40
0.01
20
0.001 0.1 1 10 100 1000 VDS, DRAIN-SOURCE VOLTAGE (V)
0 0.01
0.1
1
10
100
1000
t1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
1
D = 0.5 0.2
0.1
0.1 0.05 0.02
RJA(t) = r(t) + RJA RJA = 96 C/W P(pk) t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2
0.01
0.01
SINGLE PULSE
0.001 0.0001
0.001
0.01
0.1
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design.
FDD2612 Rev B1(W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM
OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R)
SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R)
VCXTM
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4


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